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The Draftsbook Blog

Articles, deep dives, and notes from the engineering community.

Part 7: Pulse Modulation & Companding: PAM, PWM, PPM, PCM & Quantization
Nov 5, 20262 min read

Part 7: Pulse Modulation & Companding: PAM, PWM, PPM, PCM & Quantization

Explore analog-to-digital signal conversion: comparing PAM, PWM, PPM, Pulse Code Modulation (PCM) sampling, quantization error, and µ-law/A-law companding.

By Md. Harun-Or-Roshid

Part 8: 2D Viewing Pipeline: Window-to-Viewport Transformation Coordinates
Nov 5, 20263 min read

Part 8: 2D Viewing Pipeline: Window-to-Viewport Transformation Coordinates

A study of the 2D viewing transformation pipeline, detailing coordinate normalization, world window to viewport scaling derivation, and aspect ratio preservation.

By Md. Harun-Or-Roshid

Part 7: Virtual Memory: Multi-Level Paging, Page Faults & TLB Translation
Nov 5, 20263 min read

Part 7: Virtual Memory: Multi-Level Paging, Page Faults & TLB Translation

A comprehensive analysis of virtual memory architecture, multi-level hierarchical page tables, hardware MMU address translation, and TLB HugePages acceleration.

By Md. Harun-Or-Roshid

Part 6: Wireless Transmission Fundamentals: RF Spectrum, Antennas & Path Loss
Nov 5, 20262 min read

Part 6: Wireless Transmission Fundamentals: RF Spectrum, Antennas & Path Loss

Explore unguided wireless communications: analyzing radio frequency spectrum allocations, propagation modes, free-space path loss, and MIMO antennas.

By Md. Harun-Or-Roshid

Part 6: Memory Hierarchy & Cache Coherence: L1/L2/L3 & The MESI Protocol
Nov 5, 20264 min read

Part 6: Memory Hierarchy & Cache Coherence: L1/L2/L3 & The MESI Protocol

A deep dive into high-speed memory systems, examining SRAM cache organizations, direct and set-associative mappings, write policies, and multicore MESI coherence.

By Md. Harun-Or-Roshid

Part 7: 2D Geometric Transformations: Translation, Scaling, Rotation & Matrices
Nov 5, 20262 min read

Part 7: 2D Geometric Transformations: Translation, Scaling, Rotation & Matrices

A rigorous exploration of 2D affine geometric transformations, homogeneous coordinates, 3x3 transformation matrices, and composite pivot-point rotations.

By Md. Harun-Or-Roshid

Part 7: Bitwise Logic, Masking, and Shift/Rotate Instructions in x86-64
Nov 5, 20263 min read

Part 7: Bitwise Logic, Masking, and Shift/Rotate Instructions in x86-64

Explore bitwise operations in x86-64 assembly: AND, OR, XOR, NOT, TEST, alongside logical shifts (SHL/SHR), arithmetic shifts (SAR), and rotations.

By Md. Harun-Or-Roshid

Part 5: Advanced SQL: Window Functions, Common Table Expressions & Recursion
Nov 5, 20264 min read

Part 5: Advanced SQL: Window Functions, Common Table Expressions & Recursion

Master advanced SQL: window functions, ROW_NUMBER, running totals, Common Table Expressions (CTEs), and recursive queries for hierarchical tree traversal.

By Md. Harun-Or-Roshid

Part 5: Business Intelligence (BI), Data Warehouses & Lakehouse Systems
Nov 5, 20263 min read

Part 5: Business Intelligence (BI), Data Warehouses & Lakehouse Systems

Explore Business Intelligence (BI) systems: OLTP vs OLAP, Star and Snowflake dimensional schemas, OLAP cubes, and modern Medallion Data Lakehouses.

By Md. Harun-Or-Roshid

Part 4: TCP Three-Way Handshake: Sequence Numbers, Connection Lifecycle & Teardown
Nov 5, 20263 min read

Part 4: TCP Three-Way Handshake: Sequence Numbers, Connection Lifecycle & Teardown

A comprehensive guide to the TCP three-way handshake, analyzing SYN, SYN-ACK, ACK packets, sliding window flow control, and four-way FIN teardown.

By Md. Harun-Or-Roshid

Part 5: Advanced Cloud Infrastructure: IDaaS & NaaS Fundamentals
Nov 5, 20263 min read

Part 5: Advanced Cloud Infrastructure: IDaaS & NaaS Fundamentals

A technical guide to cloud identity and network services: explore SAML/OIDC SSO, SCIM provisioning, SDN overlay architecture, and SD-WAN peering.

By Md. Harun-Or-Roshid

Part 6: x86-64 Arithmetic Instructions, Overflow & The RFLAGS Register
Nov 5, 20263 min read

Part 6: x86-64 Arithmetic Instructions, Overflow & The RFLAGS Register

Master integer math in x86-64 assembly: ADD, SUB, IMUL, IDIV, INC, DEC, NEG, and learn how ALU operations manipulate Carry, Zero, Sign, and Overflow flags.

By Md. Harun-Or-Roshid